A highly digitally transformed society requires a wide range of AI processing applications in all information devices, from data centers to edge computing, automated driving, and consumer devices. The scale of AI processing systems is showing the explosive expansion of about ten times every year, and ultra-large-scale systems with 100 billion parameters have already appeared. Such AI processing systems are built from large quantities of digital computing processors, but digital computing is seeing significant increases in the power consumption and computing latency due to the expanding computing scale. For example, an AI processing system comprising 512 GPUs requires power of 120,000 watts or more. In addition, small-scale systems are needed for applications such as edge computing, robot control, and automated driving. However, millisecond-level latency occurs in AI processing such as image recognition, which is an issue for these applications that demand high-speed response.

Therefore, research and development is recently progressing on high-throughput AI accelerators that have low power consumption and latency and can process large amounts of data without relying on digital computing. Optical neural network computing using a photonic integrated circuit is attracting attention as one such candidate. Optical neutral network computing completes computations simply by propagating light through a photonic integrated circuit with fixed parameters. There is no need for device switching such as with digital computing, so power consumption is low, and computing is completed in the time it takes for the light to propagate through the photonic integrated circuit chip, resulting in extremely small computing latency. However, it is a challenge to integrate nonlinear response devices that use light, so present optical neutral network computing circuits are realized by a hybrid configuration that converts optical signals to electrical signals and performs digital computing with an electronic circuit. For this reason, present optical neutral network computing does not make full use of its advantages in terms of both power consumption and computing latency. Therefore, the development of technology to realize neural network computing using only a photonic integrated circuit was desired. In addition, learning for optical computing circuits mainly consists of advanced learning with a computer, but direct learning of the actual circuits is needed for autonomous learning based on own experience.

Researchers in AIST developed neural network computing technology that has ultra-low latency and low power consumption and uses a silicon photonic integrated circuit instead of an electronic circuit with Nippon Telegraph and Telephone Corporation, with the support of the Japan Science and Technology Agency (JST).

This technology performs machine learning computations using a photonic integrated circuit. The electrical signals of multidimensional data to be analyzed are input to different input ports of a photonic integrated circuit and converted to optical signals, and computations are performed when the converted optical signals pass through the large number of optical interferometers built into the photonic integrated circuit. The computation results are then output as the light intensity distribution of multiple output ports.

This technology was used to realize neural network computing by only a photonic integrated circuit without passing through an electronic circuit. In this neural network computing, computations are completed simply by propagating light in a photonic integrated circuit with fixed parameters. This means that sequential switching such as with digital electronic circuits is not needed, enabling computations with a latency time of 1/1000 or less and power consumption a few percent of that of an electronic circuit. In addition, photonic circuits can be clocked at speeds ten times or faster than electronic circuits, so the amount of data processed per unit of time can also be increased. With these features, this technology is expected to be applied to AI accelerators that complement digital electronic circuits.