Japanese

 

2015 Research Highlights, Demonstration of Reliable Write Operation for “Voltage Torque MRAM”, voltage writing type non-volatile memory with ultra-low power consumption

Points of Interest

AIST has cleared the path for reduced write error rates required for practical applications of “voltage-induced writing,” which is expected to be a low power consumption writing technology in magnetic tunnel junction devices.

Figure
 

In this research, AIST demonstrated reliable operation of the voltage-induced writing method, and developed a technology for reducing the write error rate. Moreover, using computer simulations that can reproduce experiment results, AIST has shown that by reducing the magnetic damping in the recording layer and improving record retention performance, it is possible to realize a sufficiently low error rate for practical applications.

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Contact

Yoichi Shiota, Researcher  
Yoichi Shiota
Researcher
Voltage Spintronics Team, Spintronics Research Center

AIST Tsukuba Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan

TEL: +81-29-861-5433


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