Vol.4 No.1 2011

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Research paper : Development of laser-assisted inkjet printing technology (A. Endo et al.)−10−Synthesiology - English edition Vol.4 No.1 (2011) AIST. Since the waste liquid produced in the manufacturing process makes a heavy load on the environment, there are high expectations for the wire mounting process through the inkjet printing technology to achieve reduction of fabrication costs and reduce the production of waste[2][3].But, before implementing the inkjet printing technology to wiring, there are problems that had to be solved, such as the high resistance of the conductor in the ink and the decreased throughput as the wiring became finer. In this paper, we report our research and progress toward the realization of a practical inkjet wiring under the minimal manufacturing concept.2 Situation of the manufacturing technology for high-diversity production and the selection of technology to be developed2.1 Integration of the IC chip in multiple function devices and the flow of technological developmentTo achieve downsizing, high function and low power consumption of the IC chip, the “system on a chip (SoC)”concept where various functions are integrated on a single chip was actively developed.In the SoC, to integrate the functions on a single chip, the new process technology “system in package (SiP)” is used to realize the multiple functions. Here, the IC chips are inserted in a single package, or the module is created by combining the developed IC chips with the package. Currently, further downsizing and multiple functions are attained for the electronic products, and 3D integration is done by IC stacking where the IC chips are stacked inside the IC package to reduce the mounting surface area (Fig. 1). The 3D mounting technology for connecting the stacked IC chips is the key technology.Until now, electric connection by flip chip mounting was done for the 3D mounting of the IC chips. Specifically, the solder ball and soldered pad are set on the input-output terminal of the IC chip, and the solder is melted by heating in a furnace to connect the electrode terminal (ball grid array). Another way to connect the electric terminals is by heating and supercharging the space between the IC chips.However, as the IC chips are stacked, the bump became smaller and several problems became apparent, such as the difficulty of checking the connection fault, increased cost of bump installation, difficult installation of the fine Si through-via needed for interlayer connection, and the need for ultra-thin processing of Si substrate to keep the IC stack thin.On the other hand, there are methods where the electric connection between the IC chip and the interposer or lead frame is done by wire bonding, (or) where the input-output terminal is brought to the surface by creating a step on the IC chip. However, there are several issues in wiring that are very difficult to solve. One such example is that is difficult to realize a densifications in the wire connection lines to the IC chip so that there is a limit in high-speed transmission due to increased inductance in the wires[4]. The developments of the 3D mounting technology that allows electric connection over the steps between the chips and the wires on the lateral side of the stacked IC chips are immediate concerns. 2.2 Characteristics of process technologies and the technological issues of the inkjet printingWith the recent integration, the design rule inside the IC chip was reduced from about 100 m to submicron level, and the fine-sizing of wiring in the 3D mounting technology has become important. At the same time, high performance, energy and resource savings, increased production efficiency, and decreased cost are in demand for the wiring technology.Figure 2 is a comparison of the wiring technologies that are put to practice or are expected to be put to practice, including the photolithography process technologies, micro contact printing (CP) nano-imprinting, and screen printing, and the mask-less technologies, such as microchip integrated processing technology (MIPTEC) and inkjet printing.In the photolithography process, the photosensitive organic substance is exposed in patterns to create a resist film, and the metal film formed on the substrate is etched to fabricate the desired pattern. The fine patterning depends on the diffraction limit of the mask that depends on the wavelength of light used for exposure, and this must be considered to Fig. 1 Flow of high-density integration of IC chips to achieve multiple functions・Chip stacking・Reduce mounting surface areaMultiple functions and integrationRespond to multiple functions by chip combination3-dimentional mounting of chip inside packageSeal semiconductor chip inside packageCircuit within devicePackage ICSemiconductor chipEnhancement in connection technology due to increased density of the chip・Develop new process technology・Rising development cost・Lengthening of development periodIntegrate functions onto single chipSubstrateChipHigh function in single semiconductor chip(System on a Chip)SoC(System in Package)SiP

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