Vol.3 No.1 2010

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Research paper : Secure implementation of cryptographic modules (A. Satoh et al.)−95−Synthesiology - English edition Vol.3 No.1 (2010) Discussions with Reviewers1 Synthesiological descrptionComment (Hideyuki Nakashima, Future University Hakodate)Although the description of the synthesiological aspect of this research is rather weak, the paper is well written as a tutorial of the side-channel attack in cryptography, which is not necessarily widely perceived.Comment (Masaaki Mochimaru, Digital Human Research Center, AIST)The article is clearly written for non-specialists. The ideas of encryption, security evaluation, side-channel attack, and historical background, which are necessary items to understand this article, are well written. Note that this journal is about “synthesiology” as titled, intending to inform readers of synthesiological points of the authors’ work. By following this concept more closely, and making such points clearer, the authors can make the article more informative of “the approaches and ‘synthesiology’ of the work” even to readers in different fields.I think that how the AIST’s action involved the stakeholders and synthesized them to achieve the goal would be central to “synthesiology”. The authors might want to revise the article by elaborating how they changed the stakeholders and changed society to connect them to the goal.Answer (Akashi Satoh)We changed the last half of chapter 3 into “3.2 Formulation of international standard specification and expansion toward security evaluation business”, wrote up a large part about AIST’s activity in the section, and made the collaborations shown in Fig. 1 more obvious. The description of “Side-channel attack standard evaluation board (SASEBO)” was moved to section 4.2.AuthorsAkashi SatohReceived B.S. and M.S. degrees in electrical engineering from Waseda University, Tokyo, in 1987 and 1989, respectively. In 1989, joined IBM Research, Tokyo Research Laboratory, and was involved in the research and development of digital and analog VLSI circuits. Received a Ph.D. in electrical engineering from Waseda University, Tokyo in 1999. In 2007, joined the National Institute of Advanced Industrial Science and Technology, Research Center for Information Security. Current research interests include algorithms and architectures for data security and high-performance VLSI implementations. In this paper, managed the entire research project and also developed cryptographic hardware. Toshihiro KatashitaCompleted the doctoral program in Graduate School of Systems and Information Engineering, University of Tsukuba in 2006. In 2006, joined the National Institute of Advanced Industrial Science and Technology as a fixed-term researcher. In 2008, joined AIST as a tenure-track researcher. Involved in research projects on high-performance computation circuit design and on hardware security. In this paper, engaged in development of cryptographic software and hardware, and experiments of side-channel attacks. Hirofumi SakaneCompleted the master’s program in electronic engineering at the Graduate School of Electro-Communication, University of Electro-Communications in 1992. Subsequently joined Electrotechnical Laboratory. Initially studied parallel computer architecture. A senior researcher at AIST since 2001. Completed the doctoral program in information network at the Graduate School of Information Systems, University of Electro-Communications in 2001. Doctor of engineering. Currently works on safeness of implementations of cryptographic algorithms. In this paper, was engaged in standardization of security requirements for cryptographic modules in collaboration with NIST.

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