National Institute of Advanced Industrial Science and Technology (AIST)
Research resultsPublications > AIST TODAY > 2005-No.17
AIST TODAYNo.17 Summer 2005 [ PDF:15.7MB ]


Self-Aligned-Gate Ferroelectric FET with Long Memory Retention


A ferroelectric-gate field-effect transistor (FeFET) of a self-aligned-gate type has been fabricated. It has been demonstrated that an ON/OFF drain current ratio larger than 105 was held for 16 days after data writing. The success in this self-aligned-gate type means possible downsizing of FeFETs, which is indispensable for large-scale integration of non-volatile memory to the next generation. The development of one-transistor type FeRAMs and non-volatile logic integrated circuits will be accelerated.

Fig1 Fig2
Fig 1: Fabrication process of ferroelectric gate FET by self-aligned gate technique.
Fig 2: On- and off- drain current retention characteristics of ferroelectric gate FET fabricated by self-aligned gate technique (red curves). The curves for non-self-aligned gate ferroelectric FET (blue curves) were also added as references.

Relational Information

AIST Today Vol.5, No.4 (2005) p.24-25



 back